[Open-graphics] bootstrapping the video mode

[Patrick McNamara]

Timothy Miller wrote:
> On 8/1/06, Dieter <netbsd at sopwith.solgatos.com> wrote:
>
>> > and have the serial port on the card act as a system
>> > console?
>>
>> Yes.
>>
>> I am hoping that the OGC card can route messages from the mainboard
>> firmware to the OGC card's rs-232 port.  That way you have a working
>> console, which is useful for booting an OS (which device to boot from,
>> what file to boot, what flags to add).  From what I've been reading,
>> the LinuxBIOS people would find this useful as well.
>>
>
> It almost sounds like what you're asking for is the ability to watch
> the 80x25 text framebuffer, scan it periodically for changes, and then
> send that out via serial using vt100 codes so as to replicate what one
> would see on the VGA screen.
>
> How do we deal with the 24-line/25-line disparity?
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I make no guarantees at this point, but with some judicious design 
decisions this might actually be doable.  Remember that we have been 
bouncing around the idea of doing VGA emulation this way to begin with.  
If we make careful decisions the controller that does that translation 
could just as easily send the output via serial.  We may have to do away 
with niceties like programmable parity and stop bits, but who really 
uses anything but 8N1 for a console anyway.

On the SPI front, Timothy mentioned the possibility of an SPI EEPROM on 
board already.  Suppose we have a 512byte EEPROM for config info and the 
controller reads that plus another 512 bytes from the bus.  That second 
part can be anything we want it to be.  My assumption is that it would 
be from whatever was connected to the headers, 0xFF if nothing was there 
as someone else mentioned.  The BIOS can then do whatever it needs to 
with this info once the card is under processor control.

Both of these are viable options and I can see definite uses for both, 
with the first one perhaps even being a more general selling point.  I 
would like to take a quick poll and see if people agree that one or both 
of these would solve the problems we have been debating.  If so, I would 
suggest that we table this discussion until we are working on the model 
in the FPGA and have an idea how much real estate we will have to work 
with.  Not that we shouldn't keep these in mind, but I don't want use to 
expend large amounts of brainpower on a small optional feature set right 
now.  We have much bigger fish to fry at the moment.

Patrick M