[Open-graphics] Multipliers in oga1hq

[Mark]

Timothy Normand Miller wrote:
> Another idea is to use a smaller multiplier.  A pipelined 8x8
> multiplier wouldn't be nearly so bad.  In fact, André, thinks that it
> could be computed in one cycle.  If that's the case, we could just
> integrated it into the ALU.  If we need to break it into two stages,
> we can put one half in the ALU and the rest of the logic in the MEMIO
> stage.  Then we'd just have a subroutine to handle splitting up the
> operands and then summing the partial products.
> 
For an 8x8->16 multiplier, I get:
   Synplify tries for 200MHz, achieves 110MHz
   MAP      reports 41 slices (1%)
   PAR      tries for 114MHz, achieves  98MHz