[Open-graphics] Multipliers in oga1hq

Farhan Mohamed Ali farhan at cmu.edu
Sun Aug 19 11:52:32 EDT 2007


On Sun, August 19, 2007 10:37 am, Mark said:
> Farhan Mohamed Ali wrote:
>> Attached is the radix-4 multiplier. Since it was easy to make it
>> signed, i just went with that. Adding support to select signed/unsigned
>> is also easy. Can someone with the Lattice tools try synthesizing this?
>> I don't have it installed on my laptop as i'm running out of space. On
>> xilinx i get just under 7.2ns, which is the delay through the 33 bit
>> adder/subtracter. Takes 17 cycles to complete a 32x32 multiply.
> Synplify tries for 200Mhz and achieves 125MHz.  Map reports 76 slices 
> (107 4LUTs).  PAR tries for 137MHz and achieves 120MHz.  It looks like 
> the source flop is packed into an IO (again, I don't yet know how to 
> address that on this toolchain).  Below is an excerpt from the post-PAR 
> timing report, FYI:
> 
>
Thanks. Looks like it makes >100MHz, so that's good. My code was adjusted
 for best synthesis results on the xilinx tools (slowly getting an idea
 of what it likes, i've found the RTL/technology schematic view to be 
helpful). Can you just try synthesizing this one other version for me? 
Just want to see if Lattice agrees on which version synthesizes better. I
 have a few other variations which i'll try when i get back to my regular 
desktop in 10 days and install the Lattice tools.
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