[Open-graphics] Sun releases RTL design for Niagra 2 under GPL 2.0

[James Richard Tyrer]

Paul Brook wrote:
>> It is actually the FGX processor which would be of interest to us.  I
>> have wondered if it would be possible to have a graphics processor based
>> on multiple SIMD processors from standard MPUs.  I was thinking of the
>> AltiVec; however, the SPARC is available free.
> 
> This has been disucussed here several times before. It isn't a viable option 
> for two reasons:
> 
> a) Fixed function hardware is relatively easy to pipeline, and is smaller so 
> we can fit more units in the same area. Variable function hardware (aka 
> shaders) is more complicated and you generally need much higher clock and 
> shorter pipelines, which aren't feasible to implement on current FPGAs.

I have to admit that I am in the dark as to exactly what we are planning 
to implement, is there someplace where it is explained?

The UltraSparc can be implemented on a Xiliix FPGA -- have you seen:

	http://www.opensparc.net/

I guess that I could just let you and Nicolas Boulay fight it out since 
he says that fixed use hardware is a bad idea.  But, I would have to 
take the orthodox engineering position that it is an optimization 
problem that I don't pretend to know the answer to.  Fixed function 
hardware can only perform a fixed function which suggests that you might 
need more of of it -- even to the point of having 4-word vector 
processors limits what can be done with the hardware.  OTOH, to the 
extent that hardware is general purpose, you can do more things with it 
which suggests that you would need less of it.  To me, having several 
4-word processors is a reasonable compromise.  I don't see how the clock 
rate and pipeline length (which are usually antithetical) are relevant 
here except that faster clocks and shorter pipes are always nice.

As far as area is concerned, it appears to me that most of the hardware 
area is going to be consumed by the hardware multiplier arrays.  So, 
other minor differences would be minor.  This also means that you should 
avoid making fixed use of a multiplier array if that meant that it would 
stand idle part of the time.

> b) 3D rendering is a very specialised task. Using a general purpose core adds 
> lots of overhead for things that we just don't need. Even a relatively slow 
> special-purpose FPGA can get much higher thoughput and better 
> performance/watt than the fastest general purpose CPU.

Perhaps you missed this.  The VIS and AltiVec units are NOT general 
purpose cores.  They are 4-word vector processors designed for 3D graphics.

	http://www.sun.com/processors/vis/

-- 
JRT