[Open-graphics] code question(s)
Timothy Normand Miller
theosib at gmail.com
Sun Mar 4 16:26:46 EST 2007
On 3/4/07, Simon <simon80 at gmail.com> wrote:
> On 3/4/07, Timothy Normand Miller <theosib at gmail.com> wrote:
> > There are a number of different kinds of Verilog code blocks we'd
> > write, including:
> >
> > (1) Simulation prototypes of something we want to synthesize
> > (2) Synthesizable version of (1)
> > (3) Test harnesses specifically for (1) and (2)
> > (4) Library code that's generally useful for all sorts of different situations
> >
> > In general, for a specific block, like the video controller, I'd like
> > to keep (1), (2), and (3) in basically the same place, although it may
> > be sensible in many cases to have subdirectories that contain these
> > different pieces. I think this would keep things coherent. Related
> > items go together, and you can think of the pieces as a project unto
> > themselves.
>
> I agree that they should be in roughly the same directory (maybe with
> a tests subdir), but I was thinking separate files, so that files
> containing (2) can be simulated without any manipulation from initial
> blocks that aren't part of the test code.
>
> > I'm getting further behind on things, unfortulately, so your patch is
> > slipping further down my list of emails. This is why I'd like to give
> > you write access. What are the general nature of your changes?
>
> not very significant for now:
> - added a Makefile to the test directory to make it easier to manage
> tests later on
> - added a 32x32.hex target to drivers/lib/video_controller
To tell you the truth, the video controller needs a rewrite. I'd gone
part way there, then Patrick took it further, but there are still
dangling problems. I have plans to get this done myself in the near
future. (I realize you're talking about the driver, which is
separate.)
> - renamed RAMB16_S36_36.v to RAMB16_S36_S36.h
I haven't even bothered to look at this file. I'm assuming that it's
a quick and dirty simulation model, rather than, say, something copied
from Xilinx unisims?
> - moved $readmemh from RAMB16_S36_S36.v to tests/video_test.v, based
> on the above opinion
> - changed the name of the dump file in video_test.v
> - deleted the initial block from vid_control.v - I grepped for it in
> the whole tree and it seems unused, plus it's possible to just use the
> configuration register to modify that output anyway.
Do you mean "initial" or initial?
Something like:
initial begin
..... code ....
end
... is code that's run by the simulator at start time. If we're
talking about a simulation model, it may need to be there. If this is
for synthesis, the synthesizer will ignore it.
>
> I've attached a patch, but again, don't spend time applying it if
> you're busy. I plan to actually write some tests, but that won't be
> for another week, I think. Also, in all honesty, it's probably not a
> good idea to accept any changes from me without reviewing them,
> considering how little experience I have with hardware development.
>
>
--
Timothy Normand Miller
http://www.cse.ohio-state.edu/~millerti
Favorite book: The Design of Everyday Things, Donald A. Norman, ISBN
0-465-06710-7
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