[Open-graphics] decoding video in real-time

[Timothy Normand Miller]

On 3/18/07, Lourens Veen <lourens at rainbowdesert.net> wrote:

> > A pentium 4 use double frequency ALU (this permit to simulate 2 ALU).
> > Pentium 4 at 3 Ghz exist sine more than 4 years. 3 Ghz cpu imply 6
> > Ghz ALU in the pentium 4.
>
> I doubt that that ALU is 2x2cm though, it's probably very small with a
> localised clock. The Cell chip would perhaps be a better example; it's
> supposed to go up to 5 GHz I think. But then, that's basically a bunch
> of loosely coupled DSPs together with a simple PPC core (which I don't
> think runs at full speed actually, but I'm not sure), so that's another
> kettle of fish.
>
> I do think there's work going on about multiple clock domains and
> clockless computing, but I don't know whether they are anywhere near
> production on that.

The biggest limit to chip performance is wire delay.  That means that
any significant sort of routing or interconnect is going to limit your
performance.  On the other hand, if you can lay out a circuit where
the data flows from transistor to transistor, making the interconnects
negligible, then you can make circuits that are incredibly fast.  I
think I read about some GaAs chips doing 100GHz.  These are very
specialized sorts of circuits, though.  With Intel's ALU, they used
some kind of differential signalling, and they laid out by hand,
allowing them to achieve a 2x throughput.

-- 
Timothy Normand Miller
http://www.cse.ohio-state.edu/~millerti
Favorite book:  The Design of Everyday Things, Donald A. Norman, ISBN
0-465-06710-7