[Open-graphics] DDR Vtt termination ?

[howard parkin]

Strictly these resistors should be present. However, under
certain conditions, Its possible to get away with not
putting them on.

On OGD1, we can only run the memories at DDR400 (200MHz)
due to FPGA speed limitations. For SDRAM these days, that's pretty
slow. Also, we only have to deal with point-to-point links on
the data lines. Under these conditions, series termination at
the source ends of the memory data lines is OK. There is
an application note on the Micron site somewhere that details this approach
and gives some test results. To cut down reflections, we use series
resistors at the DRAM end to match the 50-ohm-or-so trace impedance
and we control the driver impedance at the FPGA end by drive strength
selection.

Doing series termination is a big plus, because it cuts down
the power. Parallel termination would have probably required
a fan on the FPGA and heatsinks on the memories.





On 10/16/07, Sebastien Bourdeauducq <sebastien.bourdeauducq at gmail.com> wrote:
> Hi,
>
> I've had a look at the board schematics from Transversal Technology, and I
> wonder why termination resistors that connect the DDRAM signal lines to a
> 1.25V (Vtt) supply are not present. From what can be read in various sources,
> DDRAM uses SSTL-2 signaling which requires that resistor (see
> http://download.micron.com/pdf/presentations/dram/plat7justin.pdf p.8 for
> instance).
>
> Is that because the PCB traces are short enough that you can get rid of that
> resistor and still get good signal integrity ?
>
> Regards,
>
> Sebastien
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