[Open-graphics] Re: de-jittering

[Vesa Solonen]

On Fri, 30 Nov 2007, Timothy Normand Miller wrote:

> to the clock you're generating.  The digital problem we're seeing is
> high-frequency jitter, while the analog one is much lower frequency,
> on the order of a few Hz.  Indeed, I suspect that a PLL with

Umm I see, are you certain that there is no ground-loop problem in your 
test setup? That analog jitter of few Hz may be some beat with mains 
frequency and vsync. Or ground loop on the pcb...

-Vesa