[Open-graphics] Sample VGA translation code, for nanocontroller

[Petter Urkedal]

On 2007-09-08, Timothy Normand Miller wrote:
> No.  Memory too, although the master controls would look almost identical.

Are we not going to use the same FIFO for streaming write and single
writes?  If we are, then I suggest unifying at least some of the ports.
In the simplest case we have just
	WRITE_ADDR
	WRITE_DATA
	WRITE_COMMAND_FREE

On each write to WRITE_DATA, WRITE_ADDR is incremented (modulus 2^6 if
necessary).  If the hardware needs to know the number of writes before
submitting, we'd also need a WRITE_COUNT which is be reset to 1 on each
write to WRITE_ADDR.