[Open-graphics] Sample VGA translation code, for nanocontroller
urkedal at nbi.dk
Sat Sep 8 10:02:12 EDT 2007
On 2007-09-08, Timothy Normand Miller wrote:
> No. Memory too, although the master controls would look almost identical.
Are we not going to use the same FIFO for streaming write and single
writes? If we are, then I suggest unifying at least some of the ports.
In the simplest case we have just
On each write to WRITE_DATA, WRITE_ADDR is incremented (modulus 2^6 if
necessary). If the hardware needs to know the number of writes before
submitting, we'd also need a WRITE_COUNT which is be reset to 1 on each
write to WRITE_ADDR.
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